In the past, electronic circuits were primarily comprised of individual, discrete components, such as transistors, resistors, capacitors, inductors, etc. Typically, these components were separately hardwired or soldered onto a printed circuit board to produce the desired output signals when properly stimulated with the desired input signals. With the advent of integrated and hybrid circuits, several of these different components can be fabricated onto a single semiconductor chip. Rapid advances in VLSI technology have led to ever faster, larger, and denser chips. Today, a complex chip can contain upwards of millions of transistors and other related components. As can be imagined, the design for properly interconnecting all these components can be very challenging. It is especially challenging to perform the interconnection as efficiently as possible, so as to minimize the chip's die size. A smaller die size means that more dies (i.e., chips) can be fabricated out of a given wafer, which directly translates into lower production costs. Further complicating matters is the fact that a large number of highly complex chips can be incorporated onto a single, multi-layered printed circuit board or as part of multiple chips modules.
The problems associated with interconnections are particularly pertinent with respect to programmable ICs, and field programmable gate arrays. These devices can have up to tens of thousands of gates which can be programmed to effect a desired circuit. Because of their programmable nature, a majority of their die size is consumed by an interconnection matrix and hence, representing a significant part of the production cost.